High-throughput and Low-cost Hardware Accelerator for Privacy Preserving Publishing

被引：0

作者：

Yamaguchi, Fumito ^{[1
]}

Nishi, Hiroaki ^{[1
]}

机构：

[1] Keio Univ, Dept Sci & Technol, Tokyo, Japan

来源：

2014 IEEE 22ND ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM 2014) | 2014年

关键词：

D O I：

10.1109/FCCM.2014.77

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Deep Packet Inspection (DPI) has become crucial for providing rich internet services, such as intrusion and phishing protection, but the use of DPI raises concerns for protecting the privacy of internet users. In this paper, a RAM-based hardware anonymizer is proposed for implementation on a Virtex-5 FPGA device. The results of the hardware anonymizer showed that the proposed architecture reduced circuit usage by 40%.

引用

页码：242 / 242

页数：1

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