Profiling in the ASP codesign environment

被引:4
作者
Parameswaran, S [1 ]
Parkinson, MF
Bartlett, P
机构
[1] Univ Queensland, Dept Elect & Comp Engn, Brisbane, Qld 4072, Australia
[2] Australian Natl Univ, Dept Syst Engn, Canberra, ACT 0200, Australia
关键词
wardware/software codesign; system level synthesis; profiling;
D O I
10.1016/S1383-7621(00)00016-3
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Automation of the hardware/software codesign (HSC) methodology brings with it the need to develop sophisticated high-level profiling tools. This paper presents a profiling tool which uses execution profiling on standard C code to obtain accurate and consistent times at the level of individual compound code sections. This tool is used in the ASP hardware/software codesign project. The results from this tool show that profiling must be performed on dedicated hardware which is as close as possible to the final implementation, as opposed to a workstation. Further, in this paper a formula is derived for the number of times a program has to be profiled in order to get an accurate estimate of the number of times a loop with an indeterminate loop count is executed. (C) 2000 Published by Elsevier Science B.V. All rights reserved.
引用
收藏
页码:1263 / 1274
页数:12
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