Task Scheduler for Dual-Core Real-Time Systems

被引:0
作者
Kohutka, Lukas [1 ]
Stopjakova, Viera [1 ]
机构
[1] Slovak Univ Technol Bratislava, Inst Elect & Photon, Bratislava, Slovakia
来源
PROCEEDINGS OF THE 23RD INTERNATIONAL CONFERENCE ON MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (MIXDES 2016) | 2016年
关键词
task; scheduling; hard real-time tasks; real-time; FPGA; coprocessor; deadline; priority; dual-core;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents the design of a coprocessor that performs conflict-free task scheduling for dual-core real-time systems. The solution proposed in this paper is based on two algorithms: Earliest Deadline First (EDF) algorithm that is proved to always find an optimal ordering of hard real-time tasks and the priority-based FIFO algorithm that is suitable for non-real-time tasks. The proposed coprocessor can efficiently handle any combination of both types of tasks even though they use different parameters for scheduling. Thanks to HW implementation of the scheduler, the operations are performed in one clock cycle regardless of the current and the maximum number of tasks in the system. The proposed coprocessor is optimized for dual-core CPUs, which can lead to higher performance of real-time embedded systems. Two different approaches for dual-core systems are proposed: semaphore approach and simultaneous processing approach. The simultaneous approach allows the coprocessor to accept and perform both instructions of both CPU cores simultaneously without any conflicts. Both approaches were verified using simplified version of UVM and applying 16 million instructions with randomly generated deadline values. Achieved synthesis results are discussed.
引用
收藏
页码:474 / 479
页数:6
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