An Ultrasound Imaging System With On-Chip Per-Voxel RX Beamfocusing for Real-Time Drone Applications

被引:7
作者
Wu, Liuhao [1 ]
Guo, Jiaqi [1 ]
Jiang, Rucheng [1 ]
Peng, Yande [2 ]
Wu, Han [1 ]
Li, Jiamin [3 ]
Luo, Yang [1 ]
Lin, Liwei [2 ]
Yoo, Jerald [1 ,4 ]
机构
[1] Natl Univ Singapore, Dept Elect & Comp Engn, Singapore 117583, Singapore
[2] Univ Calif Berkeley, Dept Mech Engn, Berkeley, CA 94720 USA
[3] Southern Univ Sci & Technol SUSTech, Sch Microelect, Shenzhen 518000, Guangdong, Peoples R China
[4] 1 Inst Hlth, Singapore 117456, Singapore
关键词
3-D imaging; all light condition; charge reuse (CR); depth sensing; drone; high-voltage transmitter (TX); low power; per-voxel RX beamfocusing (PV-RXBF); real time; standard CMOS; ultrasound; TRANSDUCERS; CONVERTER; SENSOR;
D O I
10.1109/JSSC.2022.3202502
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
For drone vision and navigation,For drone vision and navigation, low-power 3-D depth sensing with robust operations against strong/weak light and various weather conditions is crucial. CMOS image sensor (CIS) and light detection and ranging (LiDAR) can provide high-fidelity imaging. However, CIS lacks depth sensing and has difficulty in low light conditions. LiDAR is expensive with issues of dealing with strong direct interference sources. Ultrasound imaging system (UIS), on the other hand, is robust in various weather and light conditions and is cost-effective. However, in air channel, it often suffers from long image reconstruction latency and low framerate. To address these issues, we present a UIS application-specific integrated circuit (ASIC) that adopts the one-shot transmitter (TX) and on-chip per-voxel receiver (RX) beamfocusing (PV-RXBF) image reconstruction scheme. The ASIC adopts the designs of fully differential charge-reuse high-voltage TX (FDCR-HVTX), digital back-end (DBE), and an on-chip power management unit (PMU). FDCR-HVTX generates 28 V-pp pulses and reduces the average power consumption by 25% by charge reuse (CR). The DBE achieves 7.76-mu s processing latency and 9.83M-FocalPoint/s throughput to effectively translate real-time 3-D image streaming at 24 frames/s. A prototype UIS, with an 8 x 8 bulk piezo transducer array, is assembled with the proposed ASIC and a wireless data transmission module [field-programmable gate array (FPGA) + ESP32] on an entry-level consumer drone, and the real-time wireless 3-D image streaming at 24 frames/s with a range of 7 m is verified while the drone is flying. The ASIC implemented in 180-nm 1P6M Standard CMOS occupies 32.5 mm(2) and consumes 142.3 mW.
引用
收藏
页码:3186 / 3199
页数:14
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