共 2 条
- [1] Wisniewski R, 2001, DESDES '1: PROCEEDINGS OF THE INTERNATIONAL WORKSHOP ON DISCRETE-EVENT SYSTEM DESIGN, P229
- [2] WISNIEWSKI R, 2003, THESIS U ZIELONA GOR
Hardware acceleration and verification of systems designed with hardware description languages (HDL)
被引：0
作者：
Wisniewski, R
[1
]
Wegrzyn, M
[1
]
机构：
[1] Univ Zielona Gora, Comp Engn & Elect Inst, Zielona Gora, Poland
来源：
PHOTONICS APPLICATIONS IN ASTRONOMY, COMMUNICATIONS, INDUSTRY, AND HIGH-ENERGY PHYSICS EXPERIMENTS III
|
2005年
/
5775卷
关键词：
verification;
simulation;
hardware description languages;
hardware accelerators;
synthesis;
D O I：
10.1117/12.610689
中图分类号：
O43 [光学];
学科分类号：
070207 ;
0803 ;
摘要：
Hardware description languages (HDLs) allow creating bigger and bigger designs nowadays. The size of prototyped systems very often exceeds million gates. Therefore verification process of the designs takes several hours or even days. The solution for this problem can be solved by hardware acceleration of simulation.
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页码：365 / 376
页数：12
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