Modeling statistical dopant fluctuations in MOS transistors

被引:276
作者
Stolk, PA [1 ]
Widdershoven, FP [1 ]
Klaassen, DBM [1 ]
机构
[1] Philips Res Labs, NL-5656 AA Eindhoven, Netherlands
关键词
CMOS logic devices; semiconductor device doping; semiconductor device modeling; silicon materials/devices;
D O I
10.1109/16.711362
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The impact of statistical dopant fluctuations on the threshold voltage ii and de,ice performance of silicon MOSFET's is investigated by means of analytical and numerical modeling. A new analytical model describing dopant fluctuations in the active device area enables the derivation of the standard deviation, sigma(VT), of the threshold voltage distribution for arbitrary channel doping profiles. Using the MINIMOS device simulator to extend the analytical approach, it is found that sigma(VT) can be properly derived from two-dimensional (2-D) or three-dimensional (3-D) simulations using a relatively coarse simulation grid, Evaluating the threshold voltage shift arising from dopant fluctuations, on the other hand, calls for full 3-D simulations with a numerical grid that is sufficiently refined to represent the discrete nature of the dopant distribution. The average V-T-shift is found to be positive for long, narrow devices, and negative for short, wide devices. The fast 2-D MINIMOS modeling of dopant fluctuations enables an extensive statistical analysis of the intrinsic spreading in a large set of compact model parameters for state-of-the-art CMOS technology. It is predicted that V-T-variations due to dopant fluctuations become unacceptably large in CMOS generations of 0.18 mu m and beyond when the present scaling scenarios are pursued. Parameter variations can be drastically reduced by using alternative device designs with ground-plane channel profiles.
引用
收藏
页码:1960 / 1971
页数:12
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