Full-Wave Bridge Rectifier with CMOS Pass Transistors Configuration

被引:4
|
作者
Jain, Prateek [1 ]
Joshi, Amit [1 ]
机构
[1] ECED MNIT, Jaipur, Rajasthan, India
关键词
SDG-NMOS; leakage power; SGS-PMOS; low power circuit; full-wave bridge rectifier; efficiency; POWER; EFFICIENT; ENERGY; CIRCUIT;
D O I
10.1142/S0218126618500925
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
An effortless, more efficient full-wave bridge rectifier is introduced with minimum distortion. Efficient and exploratory combinations of CMOS logic are not only utilized to design full-wave bridge rectifier, but also as pass transistors configurations at the input. The particular CMOS logic (used to design core rectifier circuit) is a collective form of SDG-NMOS and SGS-PMOS. SDG-NMOS refers to a shorted drain gate n-channel metal oxide semiconductor. SGS-PMOS refers to shorted gate to source p-channel metal oxide semiconductor. Due to the utilization of renovated MOS configuration after the replacement of the diode, the efficiency of the full-wave bridge rectifier is increased up to 11% compared to p-n junction diode based full wave bridge rectifier. The proposed full wave bridge rectifier is a comparably low power circuit. The proposed CMOS based full-wave bridge rectifier is optimized at 45-nm CMOS technology. Cadence experimental simulation and implementations of the leakage power and efficiency demonstrate better consistency through the proposed circuit.
引用
收藏
页数:17
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