NBTI-Generated Defects in Nanoscaled Devices: Fast Characterization Methodology and Modeling

被引:21
作者
Gao, Rui [1 ]
Ji, Zhigang [1 ]
Manut, Azrif B. [1 ]
Zhang, Jian Fu [1 ]
Franco, Jacopo [2 ]
Hatta, Sharifah Wan Muhamad [4 ]
Zhang, Wei Dong [1 ]
Kaczer, Ben [3 ]
Linten, Dimitri [2 ]
Groeseneken, Guido [2 ]
机构
[1] Liverpool John Moores Univ, Sch Engn, Liverpool L3 3AF, Merseyside, England
[2] IMEC, B-3001 Leuven, Belgium
[3] IMEC, Reliabil Grp, B-3001 Leuven, Belgium
[4] Univ Malaya, Dept Elect Engn, Kuala Lumpur 50603, Malaysia
基金
英国工程与自然科学研究理事会;
关键词
Defect generation; hole trapping; negative bias tempeture instabilty (NBTI); variabilty; DEGRADATION; BTI;
D O I
10.1109/TED.2017.2742700
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Negative bias temperature instability (NBTI)-generated defects (GDs) have been widely observed and known to play an important role in device's lifetime. However, its characterization and modeling in nanoscaled devices is a challenge due to their stochastic nature. The objective of this paper is to develop a fast and accurate technique for characterizing the statistical properties of NBTI aging, which can be completed in one day and thus reduce test time significantly. The fast speed comes from replacing the conventional constant voltage stress by the voltage step stress (VSS), while the accuracy comes from capturing the GDs without recovery. The key advances are twofold: first, we demonstrate that this VSS-GD technique is applicable for nanoscaled devices; second, we verify the accuracy of the statistical model based on the parameters extracted from this technique against independently measured data. The proposed method provides an effective solution for GD evaluation, as required when qualifying a CMOS process.
引用
收藏
页码:4011 / 4017
页数:7
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