All-Digital Low-Dropout Regulator With Adaptive Control and Reduced Dynamic Stability for Digital Load Circuits

被引：83

作者：

Bin Nasir, Saad ^{[1
]}

Gangopadhyay, Samantak ^{[1
]}

Raychowdhury, Arijit ^{[1
]}

机构：

[1] Georgia Inst Technol, Dept Elect & Comp Engn, Atlanta, GA 30332 USA

来源：

IEEE TRANSACTIONS ON POWER ELECTRONICS | 2016年 / 31卷 / 12期

关键词：

Adaptive control; digital linear regulators; embedded power management; low power digital circuits;

D O I：

10.1109/TPEL.2016.2519446

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Digitally implementable LDOs embedded within digital functional units augment their analog counterparts for ultrafine-grained power management in digital ICs. Digital load circuits represent load currents with large and infrequent current transients and require a wide voltage range of operation, preferably down to the threshold voltage (V-TH) of the transistor. This paper presents a discrete-time, fully digital, scan-programmable LDO macro in a low-power 0.13-mu m technology operating down to 1.07x, the transistor V-TH, and featuring greater than 90% current efficiency across a 50x current range through fine-grained clock gating and adaptive control. An 8x improvement in transient response time to large load steps is achieved through switched mode control. Both transient and steady-state operation models and measurements of the LDO are presented.

引用

页码：8293 / 8302

页数：10

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