共 50 条
- [1] PAM4 signaling considerations for High-Speed Serial Links 2016 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC), 2016, : 906 - 910
- [4] PAM 4 Correlated Random Jitter Modelling for High Speed Links 2017 IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS (ICCE), 2017,
- [5] Modeling and Analysis of High-Speed I/O Links IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2009, 32 (02): : 237 - 247
- [6] Automation of the Error-Prone Pam-4 Sequence Discovery for the Purpose of High-Speed Serial Receiver Testing Using Reinforcement Learning Methods ENGINEERING APPLICATIONS OF NEURAL NETWORKS, EANN 2024, 2024, 2141 : 56 - 69
- [8] The Design Techniques for High-Speed PAM4 Clock and Data Recovery PROCEEDINGS OF 2018 IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUITS, TECHNOLOGIES AND APPLICATIONS (ICTA 2018), 2018, : 142 - 143
- [9] An Energy-Efficient High-Swing PAM-4 Voltage-Mode Transmitter PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED '18), 2018, : 49 - 54