Signal and Power Integrity Analysis of InFO Interconnect for Networking Application

MediaTek INFO Link ( M-Link) is worldwide first successful homogeneous DIE-to-DIE data link for high-speed networking application. Considering benefits from large ondie capacitance of core- power domain, merged power domain for INFO and core-power is adopted. However, in order to sustain large external core-power interference and internal INFO SSO noises, optimization of whole band target impedances to against these noises becomes one of major challenges. In this paper, a systematic approach to design M-Link in the extreme condition is proposed. In first part of paper, several PDN design considerations are discussed such as decoupling capacitor placement, via structure optimization and choice of power plane shape. In the second part, signal integrity design overview of M-Link, and choice of channel topology are discussed. Finally, given fully consideration on System-PDN and INFO SI/PI, INFO I/Os with 4.0 Gbps speed achieved 70% ETT eye windows in both simulation and verification. The design trade-off on core-power merged and separated is also discussed for future higher system bandwidth requirement.