Pulsed PMOS Sense Amplifier for High Speed Single-Ended SRAM

被引:0
作者
Park, Juhyun [1 ]
Jeong, Hanwool [1 ]
Jung, Seong-Ook [1 ]
机构
[1] Yonsei Univ, Dept Elect & Elect Engn, Seoul, South Korea
来源
2018 INTERNATIONAL CONFERENCE ON ELECTRONICS, INFORMATION, AND COMMUNICATION (ICEIC) | 2018年
关键词
8T SRAM; sense amplifier; single-ended read operation;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a pulsed pMOS sense amplifier for single-ended static random access memory (SRAM) at low supply voltage is proposed. Domino logic for single-ended SRAM such as 8T SRAA4 has a large read delay because a large read bitline swing is required. To improve read delay, previously proposed pseudo nMOS based sense amplifier was proposed. However, it has a large static current, which causes a large energy consumption. With 22nm FinFET technology, the proposed pulsed pMOS sense amplifier improves read delay by about 80% compared with conventional domino logic and reduces energy consumption by 40% compared with previously proposed pseudo nMOS based sense amplifier.
引用
收藏
页码:56 / 59
页数:4
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