Part I: On the Unification of Physics of Quasi-Saturation in LDMOS Devices

被引:21
作者
Kumar, B. Sampath [1 ]
Shrivastava, Mayank [1 ]
机构
[1] Indian Inst Sci, Dept Elect Syst Engn, Adv Nanoelect Device & Circuit Res Grp, Bangalore 560012, Karnataka, India
关键词
Drain extended MOS; electric field screening; Kirk effect; laterally diffused MOS (LDMOS); mobility degradation and space charge modulation (SCM); quasi-saturation (QS); DMOS DEVICE; BEHAVIOR; VOLTAGE; MODEL; TRANSISTORS; SOI;
D O I
10.1109/TED.2017.2777004
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
There have been a lot of ambiguities related to physics of quasi-saturation (QS) in laterally diffused MOS (LDMOS) devices in the published literature. For example, models that explain QS in input characteristics do not explain the same in output characteristics and vice versa. In addition to this, none of the earlier models explain early onset of QS at higher temperatures nor the models were validated using counter arguments. Attributed to this, a need for unified theory explaining physics of QS is justified in this paper. Furthermore, this paper for the first time, while addressing missing links between the observations reported in the past, develops a unified theory to explain physics of QS behavior. The theory presented here is independent of device architecture and covers all voltage-current-temperature trends. While considering velocity saturation and space charge modulation, we have discovered key role of high field mobility degradation of majority carriers and electric field screening, which is found to be the root cause of QS in LDMOS devices. The theory presented is further validated with numerous counter arguments. Finally, based on the new physical insight developed, we have proposed different approaches to mitigate QS effect. A detailed device design guideline to mitigate QS and its correlation with analog/RF performance, electo static discharge, hot-carrier reliability, self-heating, and safe operating area concern is presented in Part II of this paper.
引用
收藏
页码:191 / 198
页数:8
相关论文
共 20 条
[1]   Compact modeling of high-voltage LDMOS devices including quasi-saturation [J].
Aarts, ACT ;
Kloosterman, WJ .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (04) :897-902
[2]   Physical modelling strategy for (quasi-) saturation effects in lateral DMOS transistor based on the concept of intrinsic drain voltage [J].
Anghel, C ;
Hefyene, N ;
Ionescu, AM ;
Vermandel, M ;
Bakeroot, B ;
Doutreloigne, J ;
Gillon, R ;
Frere, S ;
Maier, C ;
Mourier, Y .
2001 INTERNATIONAL SEMICONDUCTOR CONFERENCE, VOL 1 & 2, PROCEEDINGS, 2001, :417-420
[3]  
Chen WJ, 2007, INT C COMMUN CIRCUIT, P1256
[4]   STUDY OF THE QUASI-SATURATION EFFECT IN VDMOS TRANSISTORS [J].
DARWISH, MN .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1986, 33 (11) :1710-1716
[5]  
El Manhawy W., 2004, Canadian Conference on Electrical and Computer Engineering 2004 (IEEE Cat. No.04CH37513), P1839, DOI 10.1109/CCECE.2004.1347561
[6]   The behavior of very high current density power MOSFET's [J].
Evans, J ;
Amaratunga, G .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1997, 44 (07) :1148-1153
[7]   Investigations on the high current behavior of lateral diffused high-voltage transistors [J].
Knaipp, M ;
Röhrer, G ;
Minixhofer, R ;
Seebacher, E .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2004, 51 (10) :1711-1720
[8]   Physically based description of quasi-saturation region of vertical DMOS power transistors [J].
Kreuzer, CH ;
Krischke, N ;
Nance, P .
IEDM - INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST 1996, 1996, :489-492
[9]  
Lekshmi T., 2009, P IEDST, P1
[10]   77-K VERSUS 300-K OPERATION - THE QUASI-SATURATION BEHAVIOR OF A DMOS DEVICE AND ITS FULLY ANALYTICAL MODEL [J].
LIU, CM ;
LOU, KH ;
KUO, JB .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1993, 40 (09) :1636-1644