Evidence of low interface trap density in GeO2/Ge metal-oxide-semiconductor structures fabricated by thermal oxidation

被引：302

作者：

Matsubara, Hiroshi ^{[1
]}

Sasada, Takashi ^{[1
]}

Takenaka, Mitsuru ^{[1
]}

Takagi, Shinichi ^{[1
]}

机构：

[1] Univ Tokyo, Bunkyo Ku, Tokyo 1138656, Japan

来源：

APPLIED PHYSICS LETTERS | 2008年 / 93卷 / 03期

关键词：

D O I：

10.1063/1.2959731

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

We have fabricated GeO(2)/Ge metal-oxide-semiconductor (MOS) structures by direct thermal oxidation of Ge substrates. The interface trap density (D(it)) of Al/GeO(2)/Ge MOS structures, measured by the low temperature conductance method including the effect of the surface potential fluctuation, is found to be reduced as the oxidation temperature increases. The minimum values of D(it) can be obtained for the oxidation around 575 degrees C, which is in the maximum temperature range where GeO volatilization does not occur under atmospheric pressure of O(2). It is also found that the hydrogen annealing before Al gate formation is effective for the passivation of GeO(2)/Ge interface states. It is clarified, as a result, that the minimum D(it) value lower than 10(11) cm(-2) eV(-1) can be obtained for GeO(2)/Ge MOS interfaces fabricated by direct oxidation of Ge substrates.

引用

页数：3

共 20 条

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