On the analysis of ΔΣ fractional-N frequency synthesizers for high-spectral purity

被引:60
作者
De Muer, B [1 ]
Steyaert, MSJ [1 ]
机构
[1] Katholieke Univ Leuven, Dept Elektrotech, Afd ESAT MICAS, B-3001 Heverlee, Belgium
来源
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING | 2003年 / 50卷 / 11期
关键词
fractional-N frequency synthesis; monolithic; nonlinear; phase-noise; Delta Sigma modulator;
D O I
10.1109/TCSII.2003.819119
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Since DeltaSigma Fractional-N synthesis is becoming a popular path to synthesizer integration, thorough analysis. is mandatory to uncover its pitfalls. Two generic analysis methods for DeltaSigma fractional-N synthesis are presented. The first analysis method is based on linear system theory and provides insight on the fundamental bandwidth limitations imposed by the DeltaSigma quantization noise in terms of rms phase error and phase-noise. To swiftly and accurately examine the effect of nonidealities on the spectral purity of the synthesizer, a fast, nonlinear analysis method is developed. Serious in-band noise leakage and reemerging spurious tones can be observed, which are in close correspondence with experimental results. Both methods are applied to distinguish the pros and cons of multistage noise-shaping (MASH) and single-loop AN modulators in fractional-N synthesis. Based on the analysis methods, practical circuit design guidelines are compiled, with a focus on monolithic DeltaSigma fractional-N synthesizer design in CMOS with high spectral purity. These circuit design guidelines are applied to design a monolithic DeltaSigma-controlled fractional-N phased-locked loop in 0.25-mum CMOS that complies to the stringent DCS-1800 cellular specifications, which serves as a test case for experimental verification of the presented analysis methods.
引用
收藏
页码:784 / 793
页数:10
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