共 30 条
[13]
DESIGNING AN ASYNCHRONOUS COMMUNICATIONS CHIP
[J].
IEEE DESIGN & TEST OF COMPUTERS,
1994, 11 (02)
:8-21
[14]
MURGAI R, 1996, LOGIC SYNTHESIS FIEL
[15]
Myers C. J., 1993, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, V1, P106, DOI 10.1109/92.238425
[16]
Nowick S. M., 1993, THESIS STANFORD U
[17]
NOWICK SM, 1994, PR IEEE COMP DESIGN, P434, DOI 10.1109/ICCD.1994.331945
[19]
THE COUNTERFLOW PIPELINE PROCESSOR ARCHITECTURE
[J].
IEEE DESIGN & TEST OF COMPUTERS,
1994, 11 (03)
:48-59
[20]
SUTHERLAND IE, 1994, COMMUNICATION