ESD failures of integrated circuits and their diagnostics using transmission line pulsing

被引：0
|
作者：
Piatek, Z. [1 ]
Kolodziejski, J. F. [2 ]
Pleskacz, W. A. [1 ]
机构：
[1] Warsaw Univ Technol, PL-00661 Warsaw, Poland
[2] Inst Elect Technol, Warsaw, Poland
来源：
PROCEEDINGS OF THE 2007 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS | 2007年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
In the work typical ESD failures of integrated circuits and ESD testing methods are presented. Authors describe dependencies between ESD models and different ESD failures. In order to allow more advanced ESD testing of integrated circuits, Transmission Line Pulsing is proposed and its correlation to HBM method described. Finally conclusions based on up-to-date research and test results obtained with the help of the assembled TLP tester are provided.
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页码：423 / +
页数：2
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