High Speed Negative Capacitance Ferroelectric Memory

被引:0
|
作者
Chang, Chun-Yen [1 ]
Fan, Chia-Chi [1 ]
Liu, Chien [2 ]
Chiu, Yu-Chien [1 ]
Cheng, Chun-Hu [3 ]
机构
[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu, Taiwan
[2] Natl Chiao Tung Univ, Dept Electrophys, Hsinchu, Taiwan
[3] Natl Taiwan Normal Univ, Dept Mechatron Engn, Taipei, Taiwan
来源
2017 IEEE 12TH INTERNATIONAL CONFERENCE ON ASIC (ASICON) | 2017年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This work experimentally demonstrated a one-transistor ferroelectric versatile memory with the multi-technique integration of negative-capacitance mechanism, ferroelectric polarization effect and metal-strained engineering. The negative-capacitance versatile memory featured a steep sub-60mV/dec subthreshold swing, fast 20-ns switching speed and long 1012 cycled endurance. We successfully demonstrated that the metal-gate-induced strain could help to improve ferroelectric phase transformation. The excellent endurance characteristics could be ascribed to efficient ferroelectric negative-capacitance switching under low program/erase voltages.
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页码:1 / 5
页数:5
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