A 4.6-μm, 127-dB Dynamic Range, Ultra-Low Power Stacked Digital Pixel Sensor With Overlapped Triple Quantization

被引:11
作者
Ikeno, Rimon [1 ]
Mori, Kazuya [1 ]
Uno, Masayuki [1 ]
Miyauchi, Ken [1 ]
Isozaki, Toshiyuki [1 ]
Takayanagi, Isao [1 ]
Nakamura, Junichi [1 ]
Wuu, Shou-Gwo [2 ]
Bainbridge, Lyle [3 ]
Berkovich, Andrew [3 ]
Chen, Song [3 ]
Chilukuri, Ramakrishna [3 ]
Gao, Wei [3 ]
Tsai, Tsung-Hsun [3 ]
Liu, Chiao [3 ]
机构
[1] Brillnics Japan Inc, Tokyo 1400013, Japan
[2] Brillnics Inc, Zhubei 302, Taiwan
[3] Meta Inc, Real Labs Res, Redmond, WA 98052 USA
关键词
Robot sensing systems; Quantization (signal); Random access memory; Partial discharges; Codes; Latches; Dynamic range; CIS; CMOS image sensor; computer vision (CV) sensor; digital pixel sensor (DPS); global shutter (GS); high dynamic range (HDR); low power; noise analysis; stacked process; CMOS IMAGE SENSOR; ADC;
D O I
10.1109/TED.2021.3121352
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This article presents a global shutter (GS), stacked digital pixel sensor (DPS) to meet the ultra-low power, ultra high dynamic range (HDR) requirements for battery-powered, always-on mobile computer vision (CV) applications. The 4.6 mu m DPS pixel is partitioned into two layers; a dual conversion gain (CG) pixel with a backside-illuminated photodiode (PD) on the top layer and an in-pixel ADC circuit with 10 bit SRAM on the bottom layer. A Cu-to-Cu hybrid-bonding (HB) technology is used to connect the two layers via pixel-level interconnect. The sensor features an overlapped triple quantization (3Q) scheme that performs a time-to-saturation (TTS) quantization and the dual-CG linear ADC mode sequentially in the same frame and extends the dynamic range (DR) with a small number of ADC bits. The DPS with a 512 x 512 pixel array has achieved an ultra-HDR of 127 dB and low power consumption of 5.75 mW at 30 frames per second. The nonlinear conversion characteristics of the TTS mode provide an equivalent full well capacity (FWC) of 9000 ke ⁻, while the high CG linear ADC mode realizes a low noise floor of 4.2 e ⁻.
引用
收藏
页码:2943 / 2950
页数:8
相关论文
共 36 条
[1]   A sensitivity and linearity improvement of a 100-dB dynamic range CMOS image sensor using a lateral overflow integration capacitor [J].
Akahane, N ;
Sugawa, S ;
Adachi, S ;
Mori, K ;
Ishiuchi, T ;
Mizobuchi, K .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2006, 41 (04) :851-858
[2]   A digital pixel image sensor for real-time readout [J].
Andoh, F ;
Shimamoto, H ;
Fujita, Y .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2000, 47 (11) :2123-2127
[3]  
[Anonymous], 2018, IEDM
[4]   A CMOS Image Sensor With In-Pixel ADC, Timestamp, and Sparse Readout [J].
Crooks, J. P. ;
Bohndiek, S. E. ;
Arvanitis, C. D. ;
Speller, R. ;
XingLiang, H. ;
Villani, E. G. ;
Towrie, M. ;
Turchetta, R. .
IEEE SENSORS JOURNAL, 2009, 9 (1-2) :20-28
[5]   Pixel level processing - Why, what, and how? [J].
El Gamal, A ;
Yang, D ;
Fowler, B .
SENSORS, CAMERAS, AND APPLICATIONS FOR DIGITAL PHOTOGRAPHY, 1999, 3650 :2-13
[7]   Quarter Video Graphics Array Digital Pixel Image Sensing With a Linear and Wide-Dynamic-Range Response by Using Pixel-Wise 3-D Integration [J].
Goto, Masahide ;
Honda, Yuki ;
Watabe, Toshihisa ;
Hagiwara, Kei ;
Nanba, Masakazu ;
Iguchi, Yoshinori ;
Saraya, Takuya ;
Kobayashi, Masaharu ;
Higurashi, Eiji ;
Toshiyoshi, Hiroshi ;
Hiramoto, Toshiro .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2019, 66 (02) :969-975
[8]   A time-to-first-spike CMOS image sensor [J].
Guo, Xiaochuan ;
Qi, Xin ;
Harris, John G. .
IEEE SENSORS JOURNAL, 2007, 7 (7-8) :1165-1175
[9]  
Huggett Anthony, 2009, 2009 IEEE International Solid-State Circuits Conference (ISSCC 2009), P52, DOI 10.1109/ISSCC.2009.4977303
[10]   A 10 000 frames/s CMOS digital pixel sensor [J].
Kleinfelder, S ;
Lim, S ;
Liu, XQ ;
El Gamal, A .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (12) :2049-2059