Ultralow-power non-volatile memory cells based on P(VDF-TrFE) ferroelectric-gate CMOS silicon nanowire channel field-effect transistors

被引:15
作者
Ngoc Huynh Van [1 ]
Lee, Jae-Hyun [2 ]
Whang, Dongmok [2 ]
Kang, Dae Joon [1 ]
机构
[1] Sungkyunkwan Univ, Dept Phys, Suwon 440746, South Korea
[2] Sungkyunkwan Univ, SKKU Adv Inst Nanotechnol, Sch Adv Mat Sci & Engn, Suwon 440746, South Korea
基金
新加坡国家研究基金会;
关键词
PERFORMANCE; INVERTER; DEVICE; LOGIC; PVDF;
D O I
10.1039/c5nr02019k
中图分类号
O6 [化学];
学科分类号
0703 ;
摘要
Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n-and p-type Si nanowire ferroelectricgate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n-and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 105 times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use.
引用
收藏
页码:11660 / 11666
页数:7
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