Zen: An Energy-Efficient High-Performance x86 Core

被引:35
|
作者
Singh, Teja [1 ]
Schaefer, Alex [1 ]
Rangarajan, Sundar [1 ]
John, Deepesh [1 ]
Henrion, Carson [2 ]
Schreiber, Russell [1 ]
Rodriguez, Miguel [2 ]
Kosonocky, Stephen [2 ]
Naffziger, Samuel [2 ]
Novak, Amy [1 ]
机构
[1] AMD, Austin, TX 78735 USA
[2] AMD, Ft Collins, CO 80528 USA
关键词
14; nm; adaptive voltage and frequency scaling (AVFS); energy efficiency; finFET; high-frequency design; microprocessors; MIMcap; power management; SYSTEM;
D O I
10.1109/JSSC.2017.2752839
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
AMD's next-generation, high-performance, energy-efficient x86 core, Zen, targets server, desktop, and mobile client applications with a 52% instructions per clock cycle (IPC) uplift over the previous generation. The increase in IPC complements a >15% process neutral reduction in C-AC (switching capacitance). Performance and energy efficiency are further improved with various circuit techniques including write word-line boost, contention-free dynamic logic, supply droop detection with mitigation, a per-core frequency synthesizer, and a per-core integrated linear voltage regulator. Utilizing a 14 nm FinFET process, the Zen core complex unit consists of a shared 8 MB L3 cache and four cores.
引用
收藏
页码:102 / 114
页数:13
相关论文
共 50 条
  • [41] High-Performance Energy-Efficient NoC Fabrics: Evolution and Future Challenges
    Anders, Mark A.
    2014 EIGHTH IEEE/ACM INTERNATIONAL SYMPOSIUM ON NETWORKS-ON-CHIP (NOCS), 2014, : I - I
  • [42] Parallelization strategies for high-performance and energy-efficient epidemic spread simulations
    Cagigas-Muniz, Daniel
    Diaz-del-Rio, Fernando
    Sevillano-Ramos, Jose Luis
    Guisado-Lizar, Jose-Luis
    SIMULATION MODELLING PRACTICE AND THEORY, 2025, 140
  • [43] Thread Batching for High-performance Energy-efficient GPU Memory Design
    Li, Bing
    Mao, Mengjie
    Liu, Xiaoxiao
    Liu, Tao
    Liu, Zihao
    Wen, Wujie
    Chen, Yiran
    Li, Hai
    ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS, 2019, 15 (04)
  • [44] 代号“Zen”AMD公布新X86架构细节
    周刚
    计算机与网络, 2015, 41(Z1) (Z1) : 46 - 46
  • [45] High-Performance Deep-Learning Coprocessor Integrated into x86 SoC with Server-Class CPUs
    Henry, Glenn
    Palangpour, Parviz
    Thomson, Michael
    Gardner, J. Scott
    Arden, Bryce
    Donahue, Jim
    Houck, Kimble
    Johnson, Jonathan
    O'Brien, Kyle
    Petersen, Scott
    Seroussi, Benjamin
    Walker, Tyler
    2020 ACM/IEEE 47TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA 2020), 2020, : 15 - 26
  • [46] Helium: Lifting High-Performance Stencil Kernels from Stripped x86 Binaries to Halide DSL Code
    Mendis, Charith
    Bosboom, Jeffrey
    Wu, Kevin
    Kamil, Shoaib
    Ragan-Kelley, Jonathan
    Paris, Sylvain
    Zhao, Qin
    Amarasinghe, Saman
    ACM SIGPLAN NOTICES, 2015, 50 (06) : 391 - 402
  • [47] A NEW X86 CORE ARCHITECTURE FOR THE NEXT GENERATION OF COMPUTING
    Clark, Mike
    2016 IEEE HOT CHIPS 28 SYMPOSIUM (HCS), 2016,
  • [48] The Floating-Point Unit of the Jaguar x86 Core
    Rupley, Jeff
    King, John
    Quinnell, Eric
    Galloway, Frank
    Patton, Ken
    Seidel, Peter-Michael
    Dinh, James
    Bui, Hai
    Bhowmik, Anasua
    2013 21ST IEEE SYMPOSIUM ON COMPUTER ARITHMETIC (ARITH), 2013, : 7 - 16
  • [49] The floating-point unit of the Jaguar x86 core
    Rupley, Jeff
    King, John
    Quinnell, Eric
    Galloway, Frank
    Patton, Ken
    Seidel, Peter-Michael
    Dinh, James
    Bui, Hai
    Bhowmik, Anasua
    Proceedings - Symposium on Computer Arithmetic, 2013, : 7 - 16
  • [50] x86-Android performance improvement for x86 smart mobile devices
    Choi, Min
    Lim, Seung-Ho
    CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2016, 28 (10): : 2770 - 2780