Zen: An Energy-Efficient High-Performance x86 Core

被引：35

作者：

Singh, Teja ^{[1
]}

Schaefer, Alex ^{[1
]}

Rangarajan, Sundar ^{[1
]}

John, Deepesh ^{[1
]}

Henrion, Carson ^{[2
]}

Schreiber, Russell ^{[1
]}

Rodriguez, Miguel ^{[2
]}

Kosonocky, Stephen ^{[2
]}

Naffziger, Samuel ^{[2
]}

Novak, Amy ^{[1
]}

机构：

[1] AMD, Austin, TX 78735 USA

[2] AMD, Ft Collins, CO 80528 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2018年 / 53卷 / 01期

关键词：

14; nm; adaptive voltage and frequency scaling (AVFS); energy efficiency; finFET; high-frequency design; microprocessors; MIMcap; power management; SYSTEM;

D O I：

10.1109/JSSC.2017.2752839

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

AMD's next-generation, high-performance, energy-efficient x86 core, Zen, targets server, desktop, and mobile client applications with a 52% instructions per clock cycle (IPC) uplift over the previous generation. The increase in IPC complements a >15% process neutral reduction in C-AC (switching capacitance). Performance and energy efficiency are further improved with various circuit techniques including write word-line boost, contention-free dynamic logic, supply droop detection with mitigation, a per-core frequency synthesizer, and a per-core integrated linear voltage regulator. Utilizing a 14 nm FinFET process, the Zen core complex unit consists of a shared 8 MB L3 cache and four cores.

引用

页码：102 / 114

页数：13

共 15 条

[1] Bohr M., 2014, P INT DEV FOR
[2] Clark M., 2016, HOT CHIPS, V28, P6
[3] A 90-nm variable frequency clock system for a power-managed Itanium Architecture processor
Fischer, T
Desai, J
Doyle, B
Naffziger, S
Patella, B
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2006, 41 (01) : 218 - 228
[4] Floyd MS, 2017, ISSCC DIG TECH PAP I, P444, DOI 10.1109/ISSCC.2017.7870452
[5] Grenat A, 2016, ISSCC DIG TECH PAP I, V59, P74, DOI 10.1109/ISSCC.2016.7417913
[6] Gwennap L., 2015, MICROPROCESSOR REPOR
[7] Horowitz M, 2005, INT EL DEVICES MEET, P11
[8] A Low Voltage SRAM Using Resonant Supply Boosting
Joshi, Rajiv V.
Ziegler, Matthew M.
Wetter, Holger
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2017, 52 (03) : 634 - 644
[9] Jotwani Ravi, 2010, 2010 IEEE International Solid-State Circuits Conference (ISSCC), P106, DOI 10.1109/ISSCC.2010.5434076
[10] Carrizo: A High Performance, Energy Efficient 28 nm APU
Munger, Benjamin
Akeson, David
Arekapudi, Srikanth
Burd, Tom
Fair, Harry R., III
Farrell, Jim
Johnson, Dave
Krishnan, Guhan
McIntyre, Hugh
McLellan, Edward
Naffziger, Samuel
Schreiber, Russell
Sundaram, Sriram
White, Jonathan
Wilcox, Kathryn
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2016, 51 (01) : 105 - 116

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