Tunable SEU-Tolerant Latch

被引:7
作者
She, Xiaoxuan [1 ]
Li, N. [2 ]
Farwell, W. Darresware [3 ]
机构
[1] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 200433, Peoples R China
[2] Gpix Inc, Orlando, FL 33816 USA
[3] RAY Co, Charlotte, NC USA
关键词
Hardened by design; latch; radiation effects; single event upset (SEU); SOFT ERRORS; DELAY; RELIABILITY;
D O I
10.1109/TNS.2010.2087358
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a single event upset (SEU) hardened latch that can mitigate SEU pulses having a width less than T, where T is the longest anticipated duration of SEUs. The propose latch includes a controllable inertial delay inverter. In order to mitigate SEUs with pulse widths less than T, a global controller uses delay locked loops to control the rise and fall times of the controllable inertial delay inverter in each latch to be equal to T. This allows T to be adjustable for different applications and environmental conditions. This technique introduces little area penalty and does not adversely affect propagation delay.
引用
收藏
页码:3787 / 3794
页数:8
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