Scalable cell technology utilizing domain wall motion for high-speed MRAM

被引：28

作者：

Numata, H. ^{[1
]}

Suzuki, T. ^{[1
]}

Ohshima, N. ^{[1
]}

Fukami, S. ^{[1
]}

Nagahara, K. ^{[1
]}

Ishiwata, N. ^{[1
]}

Kasai, N. ^{[1
]}

机构：

[1] NEC Corp Ltd, Syst Device Res Labs, 1120 Shimokuzawa, Sagamihara, Kanagawa 2291198, Japan

来源：

2007 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2007年

关键词：

D O I：

10.1109/VLSIT.2007.4339705

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We propose a new MRAM cell that stores data in the form of the domain wall (DW) position. The DW is moved by the spin-polarized current that flows in the free layer. The cell was fabricated and the writing characteristics were investigated. A writing current of the cell was scalable, and the current density was reduced by using a new material. The cell is suitable for a high-speed MRAM that will compete with an eSRAM.

引用

页码：232 / +

页数：2

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