A 1/2.7-in 2.96 MPixel CMOS image sensor with double CDS architecture for full high-definition camcorders

被引:17
作者
Takahashi, Hidekazu [1 ]
Noda, Tomoyuki [1 ]
Matsuda, Takashi [1 ]
Watanabe, Takanori [1 ]
Shinohara, Mahito [1 ]
Endo, Toshiaki [1 ]
Takimoto, Shunsuke [1 ]
Mishima, Ryuichi [1 ]
Nishimura, Shigeru [1 ]
Sakurai, Katsuhito [1 ]
Yuzurihara, Hiroshi [1 ]
Inoue, Shunsuke [1 ]
机构
[1] Canon Inc, Ctr Semicond Design & Dev, Kanagawa 2521124, Japan
关键词
CMOS image sensor; column amplifier; double CDS; double microlenses; high definition (HD); high speed;
D O I
10.1109/JSSC.2007.908719
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 1/2.7-in 1944 x 1484 pixel CMOS image sensor with double CDS architecture fabricated in a 0.18-mu m single-poly triple-metal (1P3M) CMOS process is described. It operates at 48 MHz in a progressive scanning mode at 60 frames/s for full high-definition (HD) imaging. Two transistors/pixel architecture and low optical stack with double microlenses achieve 14.6ke(-)/lx center dot s sensitivity and 14ke(-) saturation. Double CDS architecture with a high-gain column amplifier realized a low noise floor of 3.5e(rms)(-). Optimized shallow-trench isolation achieved very low dark current of 12.2e(-)/s (60 degrees C). This image sensor also realizes low power consumption of 220 mW.
引用
收藏
页码:2960 / 2967
页数:8
相关论文
共 15 条
[11]  
Nitta Y., 2006, IEEE INT SOL STAT CI, P2024
[12]  
SHINOHARA M, 2003, Patent No. 200351989
[13]   A 3.9-μm pixel pitch VGA format 10-b digital output CMOS image sensor with 1.5 transistor/pixel [J].
Takahashi, H ;
Kinoshita, M ;
Morita, K ;
Shirai, T ;
Sato, T ;
Kimura, T ;
Yuzurihara, H ;
Inoue, S ;
Matsumoto, S .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (12) :2417-2425
[14]  
YAMADA T, 2003, IEEE WORKSH CHARG DE
[15]  
YOSHIHARA S, 2006, ISSCC, P492