C2TIG: Dynamic C2MOS Design Based on Three-Independent-Gate Field-Effect Transistors

被引:14
作者
Vana, Daniel [1 ]
Gaillardon, Pierre-Emmanuel [2 ]
Teman, Adam [3 ]
机构
[1] Tel Aviv Univ, Sch Elect Engn, IL-69978 Tel Aviv, Israel
[2] Univ Utah, Dept Elect & Comp Engn, Salt Lake City, UT 84112 USA
[3] Bar Ilan Univ, Fac Engn, Emerging Nanoscale Integrated Circuits & Syst EnI, IL-52900 Ramat Gan, Israel
关键词
Field effect transistors; integrated circuit technology; integrated circuit reliability; nanoscale devices; sequential circuits; HIGH-PERFORMANCE; LOGIC GATES; CIRCUITS;
D O I
10.1109/TNANO.2020.2965119
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Dynamic logic has become a niche approach in circuit design, mainly due to the reliability limitations that have been aggravated with process down-scaling. To that extent, the performance and area benefits of dynamic design approaches, such as the integration of the Clocked CMOS ((CMOS)-M-2) approach, are left on the table. In this article, we propose employing the Three-Independent-Gate Field-Effect Transistor (TIGFET) technology for the implementation of the (CMOS)-M-2 approach, which we call the Clocked Complementary TIG (C(2)TIG) approach. Electrical simulations at 22nm demonstrate the enhanced robustness of the C(2)TIG approach, while providing gains in power, performance, and area. Finally, new design opportunities for synchronous systems are demonstrated with the C(2)TIG approach.
引用
收藏
页码:123 / 136
页数:14
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