Fast Energy Aware Application Specific Network-on-Chip Topology Generator

被引:1
作者
Choudhary, Naveen [1 ]
Gaur, M. S. [1 ]
Laxmi, V. [1 ]
Singh, V. [2 ]
机构
[1] Malaviya Natl Inst Technol, Dept Comp Engn, Jaipur, Rajasthan, India
[2] Indian Inst Sci, Super Comp Educ & Res Ctr, Bangalore, Karnataka, India
来源
2010 IEEE 2ND INTERNATIONAL ADVANCE COMPUTING CONFERENCE | 2010年
关键词
Network-on-Chip; Deterministic; Performance; Energy; Cores;
D O I
10.1109/IADCC.2010.5423002
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Network-on-Chip(NoC) has been proposed as a solution for addressing the design challenges of future high-performance nanoscale architecture. Application specific SoC design offers the opportunity for incorporating custom NoC architectures that are more suitable for a particular application, and do not necessarily conform to regular topologies. In this paper, fast deterministic methodologies are proposed for synthesis of energy aware communication architecture along with corresponding routing tables of an application specific NoC where the traffic communication traffic characteristics can be well characterized at design time.
引用
收藏
页码:250 / +
页数:3
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