A high-performance miniaturized 3-15.5-GHz 13-Db cmos distributed amplifier

In this article, we demonstrate a high-performance 3-15.5-GHz distributed amplifier (DA) for ultra-wideband (UWB) system applications implemented with a standard 0.18- mu m CMOS technology. To achieve high gain, wide bandwidth, and small chip-area at the same time, miniaturized inductors with high quality-factor and small parasitic capacitance were adopted, the bias of the field-effect transistors (FETs) was optimized, and cascode FETs were used to replace the traditional conunon-source FETs. In addition, to improve the stability of the DA, a damping resistor R-G was added to the gale of the common-gate FETs. Over the 3-15.5-GHz frequency bond, this LNA achieved good forward gain (S-21) of 10-13 dB, input return loss (S-11) of - 11.5 to -31.4 dB, reverse isolation (S-12) of -21.6 to -37.1 dB, and noise figure (NF) of 5 to 7.2 dB. Moreover, the DA exhibited good input 1-dB compression point (P-1dB) of - 1.5 dBm and input third-order inter-modulation point (IIP3) of 12.5 dBm at 6 GHZ, The chip area was only 1050.9 mu m X 539.8 mu m (i.e. 0.567 mm(2)) excluding the test pads. (C) 2007 Wiley Periodicals, Inc.