A Novel High-Breakdown-Voltage SOI MESFET by Modified Charge Distribution

被引:44
作者
Aminbeidokhti, Amirhossein [1 ]
Orouji, Ali A. [1 ]
Rahmaninezhad, Soude [1 ]
Ghasemian, Masoomeh [1 ]
机构
[1] Semnan Univ, Dept Elect Engn, Semnan 3519645399, Iran
关键词
Metal-semiconductor field-effect transistor (MESFET); modified charge distribution; silicon on insulator (SOI); superior electrical performances; MODEL;
D O I
10.1109/TED.2012.2186580
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a novel silicon-on-insulator (SOI) metal-semiconductor field-effect transistor (MESFET) with modified charge distribution is presented. Changing charge distribution leads to lower electric field crowding and increased breakdown voltage (V-BR). For modifying charge distribution, a metal region (MR) is utilized in buried oxide of the SOI MESFET. In order to achieve the best results, the MR location and dimensions are optimized carefully. DC and radio frequency characteristics of the SOI MESFET with MR (MR-SOI MESFET) are analyzed by 2-D numerical simulation and compared with conventional SOI MESFET (C-SOI MESFET) characteristics. The simulated results show that the MR has excellent effect on the V-BR of the device. The V-BR of the MR-SOI MESFET structure improves by 116% compared with that of the C-SOI MESFET structure. Although drain current of the proposed structure reduces slightly, 126% improvement in maximum output power density of the device is achieved due to high enhancement of the V-BR. Also, the MR leads to the enhancement of maximum oscillation frequency and maximum available gain of the MR-SOI MESFET structure. As a result, the MR-SOI MESFET structure has superior electrical performances in comparison with the similar device based on the conventional structure.
引用
收藏
页码:1255 / 1262
页数:8
相关论文
共 24 条
[1]  
[Anonymous], 2005, DEV SIM ATL ATL US M
[2]   Effects of oxide-fixed charge on the breakdown voltage of superjunction devices [J].
Balaji, S. ;
Karmalkar, S. .
IEEE ELECTRON DEVICE LETTERS, 2007, 28 (03) :229-231
[3]   Large-signal modeling of SOI MESFETs [J].
Balijepalli, A. ;
Vijayaraghavan, R. ;
Ervin, J. ;
Yang, J. ;
Islam, S. K. ;
Thornton, T. J. .
SOLID-STATE ELECTRONICS, 2006, 50 (06) :943-950
[4]   High-voltage CMOS compatible SOI MESFET characterization and spice model extraction [J].
Balijepalli, Asha ;
Ervin, Joseph ;
Joshi, Punarvasu ;
Yang, Jinman ;
Cao, Yu ;
Thornton, Trevor J. .
2006 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM DIGEST, VOLS 1-5, 2006, :1335-+
[5]  
Chattopadhyay Dr. Somnath, 2008, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, V8, P251
[6]  
Cristoloveanu S., 1995, ELECT CHARACTERIZATI
[7]   Single crystal silicon MEMS fabrication based on smart-cut technique [J].
Du, JG ;
Ko, WH ;
Young, DJ .
SENSORS AND ACTUATORS A-PHYSICAL, 2004, 112 (01) :116-121
[8]   A 1300-V 0.34-Ω . cm2 Partial SOI LDMOSFET With Novel Dual Charge Accumulation Layers [J].
Elahipanah, Hossein ;
Orouji, Ali A. .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2010, 57 (08) :1959-1965
[9]   CMOS-compatible SOI MESFETs with high breakdown voltage [J].
Ervin, Joseph ;
Balijepalli, Asha ;
Joshi, Punarvasu ;
Kushner, Vadim ;
Yang, Jinman ;
Thornton, Trevor J. .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (12) :3129-3135
[10]   Engineering strained silicon on insulator wafers with the Smart Cut™ technology [J].
Ghyselen, B ;
Hartmann, JM ;
Ernst, T ;
Aulnette, C ;
Osternaud, B ;
Bogumilowicz, Y ;
Abbadie, A ;
Besson, P ;
Rayssac, O ;
Tiberj, A ;
Daval, N ;
Cayrefourq, I ;
Fournel, F ;
Moriceau, H ;
Di Nardo, C ;
Andrieu, F ;
Paillard, V ;
Cabié, M ;
Vincent, L ;
Snoeck, E ;
Cristiano, F ;
Rocher, A ;
Ponchet, A ;
Claverie, A ;
Boucaud, P ;
Semeria, MN ;
Bensahel, D ;
Kernevez, B ;
Mazure, C .
SOLID-STATE ELECTRONICS, 2004, 48 (08) :1285-1296