An Adaline based fast voltage controller for single-phase PFC converters

A single input Adaline trained with batch mu-LMS algorithm is proposed, designed and simulated for fast estimation of ripple-averaged component of scaled DC bus voltage in voltage feedback path of Power-Factor Correction (PFC) converters. This allows design of large bandwidth voltage regulator for fast voltage regulation. Fast voltage regulators eliminate large overshoots and undershoot in DC bus voltage during transients, which are prevalent in conventionally designed PFC converters. This work demonstrates the usefulness of an extremely simple LMS algorithm based estimator for alleviating the problem of slow voltage regulation due to low-pass filtering in the feedback path or for avoiding complexities of model based ripple estimators for ripple cancellation to achieve fast voltage regulation.