Dual Gate Single-Electron Transistors with a Recessed Channel and Underlapped Source/Drain Structure

被引：0

作者：

Lee, Joung-Eob ^{[1
,2
]}

Kim, Garam ^{[1
,2
]}

Yun, Jang-Gn ^{[1
,2
]}

Kang, Kwon-Chil ^{[1
,2
]}

Lee, Jung-Han ^{[1
,2
]}

Kim, Dae-Hwan ^{[3
]}

Lee, Jong-Ho ^{[1
,2
]}

Shin, Hyungcheol ^{[1
,2
]}

Park, Byung-Gook ^{[1
,2
]}

机构：

[1] Seoul Natl Univ, Inter Univ Semicond Res Ctr, Seoul 151742, South Korea

[2] Seoul Natl Univ, Sch Elect Engn, Seoul 151742, South Korea

[3] Kookmin Univ, Sch Elect Engn, Seoul 146702, South Korea

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS | 2010年 / 49卷 / 11期

关键词：

COULOMB-BLOCKADE OSCILLATIONS; TUNNELING BARRIER STRUCTURES; SILICON QUANTUM-DOT; ROOM-TEMPERATURE; SWITCH; LOGIC;

D O I：

10.1143/JJAP.49.115201

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

In this work, we have fabricated and characterized the dual gate single electron transistors (DG SETs) This device has recessed channel and underlapped source/drain structure Fabrication flow and device structure are described as well as operation schemes Clear Coulomb oscillation peaks and negative differential trans conductance curve are observed at room temperature (300 K) Measurement results obtained at period of Coulomb oscillation is 0.9V due to an ultra small control gate capacitance and oscillation peaks are shifted through the sidewall gate bias Also in order to confirm that single electron tunneling is caused by the electrically induced tunneling barriers and not by random fluctuations along the silicon-on-insulator (SOI) active room temperature measurement results for device with different parameters compared (C) 2010 The Japan Society of Applied Physics

引用

页数：5

共 27 条

[1] Fabrication and room-temperature characterization of a silicon self-assembled quantum-dot transistor [J].

Choi, BH ;

Hwang, SW ;

Kim, IG ;

Shin, HC ;

Kim, Y ;

Kim, EK .

APPLIED PHYSICS LETTERS, 1998, 73 (21) :3129-3131

[2] Manipulation of elementary charge in a silicon charge-coupled device [J].

Fujiwara, A ;

Takahashi, Y .

NATURE, 2001, 410 (6828) :560-562

[3] A merged single-electron transistor and metal-oxide-semiconductor transistor logic for interface and multiple-valued functions [J].

Inokawa, H ;

Fujiwara, A ;

Takahashi, Y .

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 2002, 41 (4B) :2566-2568

[4] Coulomb blockade oscillations at room temperature in a Si quantum wire metal-oxide-semiconductor field-effect transistor fabricated by anisotropic etching on a silicon-on-insulator substrate [J].

Ishikuro, H ;

Fujii, T ;

Saraya, T ;

Hashiguchi, G ;

Hiramoto, T ;

Ikoma, T .

APPLIED PHYSICS LETTERS, 1996, 68 (25) :3585-3587

[5] Quantum mechanical effects in the silicon quantum dot in a single-electron transistor [J].

Ishikuro, H ;

Hiramoto, T .

APPLIED PHYSICS LETTERS, 1997, 71 (25) :3691-3693

[6] Self-aligned dual-gate single-electron transistors [J].

Kang, Sangwoo ;

Kim, Dae-Hwan ;

Park, Il-Han ;

Kim, Jin-Ho ;

Lee, Joung-Eob ;

Lee, Jong Duk ;

Park, Byung-Gook .

JAPANESE JOURNAL OF APPLIED PHYSICS, 2008, 47 (04) :3118-3122

[7]

Kim DH, 2002, IEEE T ELECTRON DEV, V49, P627, DOI 10.1109/16.992872

[8] Room temperature coulomb oscillation of a single electron switch with an electrically formed quantum dot and its modeling [J].

Kim, DH ;

Lee, JD ;

Park, BG .

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 2000, 39 (4B) :2329-2333

[9] Single-electron devices and their applications [J].

Likharev, KK .

PROCEEDINGS OF THE IEEE, 1999, 87 (04) :606-632

[10] SINGLE-ELECTRON TRANSISTORS - ELECTROSTATIC ANALOGS OF THE DC SQUIDS [J].

LIKHAREV, KK .

IEEE TRANSACTIONS ON MAGNETICS, 1987, 23 (02) :1142-1145

← 1 2 3 →