High Performance Real-Time Pre-Processing for Fixed-Complexity Sphere Decoder

被引:0
|
作者
Wu, Yun [1 ]
McAllister, John [1 ]
Wang, Peng [1 ]
机构
[1] Queens Univ Belfast, Inst Elect Commun & Informat Technol ECIT, Belfast BT7 1NN, Antrim, North Ireland
基金
英国工程与自然科学研究理事会;
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Pre-processing (PP) of received symbol vector and channel matrices is an essential pre-requisite operation for Sphere Decoder (SD)-based detection of Multiple-Input Multiple-Output (MIMO) wireless systems. PP is a highly complex operation, but relative to the total SD workload it represents a relatively small fraction of the overall computational cost of detecting an OFDM MIMO frame in standards such as 802.11n. Despite this, real-time PP architectures are highly inefficient, dominating the resource cost of real-time SD architectures. This paper resolves this issue. By reorganising the ordering and QR decomposition sub operations of PP, we describe a Field Programmable Gate Array (FPGA)-based PP architecture for the Fixed Complexity Sphere Decoder (FSD) applied to 4 x 4 802.11n MIMO which reduces resource cost by 50% as compared to state-of-the-art solutions whilst maintaining real-time performance.
引用
收藏
页码:1250 / 1253
页数:4
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