In-memory computing to break the memory wall*

被引:38
作者
Huang, Xiaohe [1 ]
Liu, Chunsen [1 ,2 ]
Jiang, Yu-Gang [2 ]
Zhou, Peng [1 ]
机构
[1] Fudan Univ, Sch Microelect, State Key Lab ASIC & Syst, Shanghai 200433, Peoples R China
[2] Fudan Univ, Sch Comp Sci, Shanghai 200433, Peoples R China
关键词
in-memory computing; non-volatile memory; device technologies; crossbar array; RANDOM-ACCESS-MEMORY; PHASE-CHANGE MEMORY; LOGIC OPERATIONS; MEMRISTIVE DEVICES; NETWORK; COMPUTATION; SPIN; RESISTANCE; EFFICIENT; ARRAY;
D O I
10.1088/1674-1056/ab90e7
中图分类号
O4 [物理学];
学科分类号
0702 ;
摘要
Facing the computing demands of Internet of things (IoT) and artificial intelligence (AI), the cost induced by moving the data between the central processing unit (CPU) and memory is the key problem and a chip featured with flexible structural unit, ultra-low power consumption, and huge parallelism will be needed. In-memory computing, a non-von Neumann architecture fusing memory units and computing units, can eliminate the data transfer time and energy consumption while performing massive parallel computations. Prototype in-memory computing schemes modified from different memory technologies have shown orders of magnitude improvement in computing efficiency, making it be regarded as the ultimate computing paradigm. Here we review the state-of-the-art memory device technologies potential for in-memory computing, summarize their versatile applications in neural network, stochastic generation, and hybrid precision digital computing, with promising solutions for unprecedented computing tasks, and also discuss the challenges of stability and integration for general in-memory computing.
引用
收藏
页数:21
相关论文
共 180 条
[81]  
Kim W., 2016, 2016 IEEE International Electron Devices Meeting (IEDM), p4.2.1, DOI 10.1109/IEDM.2016.7838343
[82]  
Knag P., 2019, Stochastic Computing: Techniques and Applications, P153
[83]   Nanoelectronic Programmable Synapses Based on Phase Change Materials for Brain-Inspired Computing [J].
Kuzum, Duygu ;
Jeyasingh, Rakesh G. D. ;
Lee, Byoungil ;
Wong, H. -S. Philip .
NANO LETTERS, 2012, 12 (05) :2179-2186
[84]   MAGIC-Memristor-Aided Logic [J].
Kvatinsky, Shahar ;
Belousov, Dmitry ;
Liman, Slavik ;
Satat, Guy ;
Wald, Nimrod ;
Friedman, Eby G. ;
Kolodny, Avinoam ;
Weiser, Uri C. .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2014, 61 (11) :895-899
[85]   Compressed Sensing With Approximate Message Passing Using In-Memory Computing [J].
Le Gallo, Manuel ;
Sebastian, Abu ;
Cherubini, Giovanni ;
Giefers, Heiner ;
Eleftheriou, Evangelos .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2018, 65 (10) :4304-4312
[86]   Mixed-precision in-memory computing [J].
Le Gallo, Manuel ;
Sebastian, Abu ;
Mathis, Roland ;
Manica, Matteo ;
Giefers, Heiner ;
Tuma, Tomas ;
Bekas, Costas ;
Curioni, Alessandro ;
Eleftheriou, Evangelos .
NATURE ELECTRONICS, 2018, 1 (04) :246-253
[87]  
Le QV, 2013, INT CONF ACOUST SPEE, P8595, DOI 10.1109/ICASSP.2013.6639343
[88]  
Lee DU, 2014, ISSCC DIG TECH PAP I, V57, P432, DOI 10.1109/ISSCC.2014.6757501
[89]   A magnetic synapse: multilevel spin-torque memristor with perpendicular anisotropy [J].
Lequeux, Steven ;
Sampaio, Joao ;
Cros, Vincent ;
Yakushiji, Kay ;
Fukushima, Akio ;
Matsumoto, Rie ;
Kubota, Hitoshi ;
Yuasa, Shinji ;
Grollier, Julie .
SCIENTIFIC REPORTS, 2016, 6
[90]   Large Memristor Crossbars for Analog Computing [J].
Li, Can ;
Li, Yunning ;
Jiang, Hao ;
Song, Wenhao ;
Lin, Peng ;
Wang, Zhongrui ;
Yang, J. Joshua ;
Xia, Qiangfei ;
Hu, Miao ;
Montgomery, Eric ;
Zhang, Jiaming ;
Davila, Noraica ;
Graves, Catherine E. ;
Li, Zhiyong ;
Strachan, John Paul ;
Williams, R. Stanley ;
Ge, Ning ;
Barnell, Mark ;
Wu, Qing .
2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2018,