Circuitry design feature of stages with high-gain coefficient on field-effect transistors

被引：0

作者：

Krutchinsky, Sergey ^{[1
]}

Bespyatov, Vasiliy ^{[1
]}

Korolev, Alexander ^{[1
]}

Zhebrun, Eugeniy ^{[1
]}

Zolotarev, Anton ^{[1
]}

机构：

[1] So Fed Univ, Educ Res Ctr Syst Design Technol, Taganrog 347928, Rostov Region, Russia

来源：

KEY ENGINEERING MATERIALS AND COMPUTER SCIENCE | 2011年 / 320卷

关键词：

component; microcircuitry; structural synthesis; integral project blocks; differential stage;

D O I：

10.4028/www.scientific.net/AMR.320.589

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

The feature of implementing of loops with self-compensation of CMOS transistors differential resistance in the gain stages is reviewed. Shown that these compensation loops reduce the parametric sensitivity of the stage and the transistors output capacitance influence on a range of operating frequencies. A set of loops of cancellation of the CMOS transistors parasitic parameters influence on stage cutoff frequency was proposed. The conclusions were made. An example of cost-stage high gain was given.

引用

页码：589 / 596

页数：8