Task feasibility analysis and dynamic voltage scaling in fault-tolerant real-time embedded systems

被引：18

作者：

Zhang, Y ^{[1
]}

Chakrabarty, K ^{[1
]}

机构：

[1] Duke Univ, Dept Elect & Comp Engn, Durham, NC 27708 USA

来源：

DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS | 2004年

关键词：

D O I：

10.1109/DATE.2004.1269050

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We investigate dynamic voltage scaling (DVS) in real-time embedded systems that use checkpointing for fault tolerance. We present feasibility-of-scheduling tests for checkpointing schemes for a constant processor speed as well as for variable processor speeds. DVS is then carried out on the basis of the feasibility analysis. We incorporate practical issues such as faults during checkpointing and state restoration, rollback recovery time, memory access time and energy, and DVS overhead. Simulation results are presented for real-life checkpointing data and embedded processors.

引用

页码：1170 / 1175

页数：6

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