BIST structure for DAC testing

被引：16

作者：

Wen, YC ^{[1
]}

Lee, KJ ^{[1
]}

机构：

[1] Natl Cheng Kung Univ, Dept Elect Engn, Tainan 70101, Taiwan

来源：

ELECTRONICS LETTERS | 1998年 / 34卷 / 12期

关键词：

D O I：

10.1049/el:19980874

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A built-in self-test (BIST) structure for digital-to-analogue converter (DAC) testing is presented. The basic idea is to divide the input codes (0, 1, ..., 2(n)-1) of the DAC under test into a number of segments. The DAC output voltages corresponding to different codes in the same segment are amplified to the same voltage value, such that one single reference voltage can be used to test all codes in the same segment. By this method, the number of reference voltages required for DAC testing can be greatly reduced. We show that offset error, gain error, integral nonlinearity (INL), and differential nonlinearity (DNL) are effectively detected in the proposed BIST structure.

引用

页码：1173 / 1174

页数：2