CMOS logarithmic curvature-corrected voltage reference using a multiple differential structure

被引:0
作者
Popa, C [1 ]
机构
[1] Univ Politehn Bucharest, Fac Elect Telecommun & Informat Technol, Bucharest, Romania
来源
ISSCS 2005: International Symposium on Signals, Circuits and Systems, Vols 1 and 2, Proceedings | 2005年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new superior-order curvature-corrected voltage reference will be presented. In order to improve the temperature behavior of the circuit, a double differential structure will be used, implementing the linear and the superior-order curvature corrections. An original CTAT (ComplemenTary with Absolute Temperature) voltage generator will be proposed, using exclusively MOS transistors biased in weak inversion for a low power operation of the voltage reference, having two great advantages: an important reducing of the circuit silicon area and an improved accuracy. The superior-order curvature-correction will be implemented by taking the difference between two gate-source voltages of subthreshold-operated MOS transistors, biased at drain currents having different temperature dependencies: PTAT (ProporTional with Absolute Temperature) and PTAT(2). In order to obtain a low-voltage operation of the circuit, the classical MOS transistor, which implements the zero-order compensated voltage reference, will be replaced by a DTMS (Dynamic Threshold MOS) transistor. The SPICE simulations confirm the theoretical estimated results, showing a temperature coefficient under 9.4 ppm / K for an extended input range 173 K < T < 423K and for a supply voltage of 2.5V and a current consumption of about 1 mu A.
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页码:413 / 416
页数:4
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