Performance Analysis of a Front High-K Gate Stack Dual-Material Tri-gate SON MOSFET

被引：0

作者：

Banerjee, Pritha ^{[1
]}

Sarkar, Anup ^{[2
]}

Dash, Dinesh Kumar ^{[1
]}

Sarkar, Subir Kumar ^{[1
]}

机构：

[1] Jadavpur Univ, Dept Elect & Telecommun Engn, Kolkata 700032, India

[2] Womens Polytech, Kolkata, India

来源：

ADVANCES IN COMMUNICATION, DEVICES AND NETWORKING | 2018年 / 462卷

关键词：

Short-channel effects; Tri-gate MOSFET; Gate work function engineering; Hot carrier effect (HCE); Silicon-on-insulator (SOI); Silicon-on-nothing (SON); THRESHOLD VOLTAGE; MODEL;

D O I：

10.1007/978-981-10-7901-6_9

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This present work encompasses the analytical modeling of a front high-K gate stack dual-material tri-gate SON MOSFET. By solving the three-dimensional Poisson's equation, the expression for surface potential of the proposed device is obtained. In addition, the electric field of the device is also calculated. The results obtained are compared with the model's single-metal counterpart. The extent of agreement between the analytical results and simulated results obtained from a 3-D device simulator, namely Atlas, Silvaco, is quite good that validates our proposed model.

引用

页码：69 / 77

页数：9

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