III-V/Ge CMOS technologies on Si platform

被引：21

作者：

Takagi, S. ^{[1
]}

Takenaka, M. ^{[1
]}

机构：

[1] Univ Tokyo, Dept Elect Engn & Informat Syst, Bunkyo Ku, Tokyo 1138656, Japan

来源：

2010 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2010年

关键词：

INGAAS;

D O I：

10.1109/VLSIT.2010.5556205

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

III-V/Ge CMOS on Si platform, realized by heterogeneous integration, is expected to provide a variety of applications from high speed logic CMOS to versatile SoC chips, where various functional devices can be co-integrated. Among them, we are currently pursuing high speed/low power logic CMOS using III-V/Ge channels. While many critical issues have been well recognized for them, we present possible solutions to break through these difficulties in this presentation.

引用

页码：147 / 148

页数：2

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