300 mm wafer-level hybrid bonding for Cu/interlayer dielectric bonding in vacuum

被引：19

作者：

Fujino, Masahisa ^{[1
]}

Takahashi, Kenji ^{[1
]}

Araga, Yuuki ^{[1
]}

Kikuchi, Katsuya ^{[1
]}

机构：

[1] Natl Inst Adv Ind Sci & Technol, AIST Tsukuba Cent 1, Nanoelect Res Inst NeRI, Umezono 1-1-1, Tsukuba, Ibaraki 3058560, Japan

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS | 2020年 / 59卷 / SB期

关键词：

SURFACE-ROUGHNESS; SILICON-WAFERS; ROOM;

D O I：

10.7567/1347-4065/ab4b2b

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

Wafer bonding technology is one of the key technologies for high-density three-dimensional integration. We demonstrated 300 mm wafer-level hybrid bonding with Cu and an interlayer dielectric (ILD) layer with the design of 1 x 1 mu m(2) pads with 2 mu m pitch. In this sequence of the bonding process, the structure of Cu bonding pads was controlled to be precisely convex to the ILD layer by chemical-mechanical polishing. Then the bonding process was performed in vacuum. Lastly, the bonded wafers were annealed at 200 degrees C for the postannealing process. As a result, hybrid wafer bonding with few voids was successfully accomplished. (C) 2019 The Japan Society of Applied Physics

引用

页数：8

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