A ns-2 simulator utilizing chaotic maps for Network-on-Chip traffic analysis

被引：9

作者：

Hegedûs, A ^{[1
]}

Maggio, GM ^{[1
]}

Kocarev, L ^{[1
]}

机构：

[1] Univ Calif San Diego, Inst Nonlinear Sci, La Jolla, CA 92093 USA

来源：

2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS | 2005年

关键词：

D O I：

10.1109/ISCAS.2005.1465352

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

NoC (Network-on-Chip) is an emerging paradigm that copes with the increasing complexity and communication requirements of current SoCs (System-on-Chip). In this work, we present an ns-2 (Network Simulator) simulation environment for NoC traffic analysis. Namely, the NoC model is illustrated in details and simulation results are reported. One-dimensional chaotic maps are used for generating long-range dependent traffic.

引用

页码：3375 / 3378

页数：4