On the series resistance in staggered amorphous thin film transistors

被引:15
|
作者
Cerdeira, Antonio [1 ]
Estrada, Magali [1 ]
Marsal, Lluis F. [2 ]
Pallares, Josep [2 ]
Iniguez, Benjamin [2 ]
机构
[1] CINVESTAV, Dept Ingn Elect, Secc Elect Estado Solido, Mexico City, DF, Mexico
[2] Univ Rovira & Virgili, DEEEA, E-43007 Tarragona, Spain
基金
欧盟地平线“2020”;
关键词
Series resistance staggered amorphous TFTs; TFT modeling; ELECTRODE CONTACT RESISTANCE; FIELD-EFFECT-MOBILITY; PARAMETER EXTRACTION; MODEL PARAMETERS; CHANNEL-LENGTH; GATE-VOLTAGE; SILICON; TFT; PERFORMANCE;
D O I
10.1016/j.microrel.2016.05.005
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper we review and assess the main methods reported to extract the parasitic resistance in staggered amorphous TFTs. We present and discuss examples of their application to bottom gate top contacts a-Si TFTs and AOSTFTs, as well as top gate bottom contacts OTFTs. We show that for modeling purposes, the parasitic series resistance can be considered a second order parameter, as far as its value is much lower than the value of the channel resistance. As a result, we also concluded that for modeling purposes it is not necessary to account for the bias dependence of the parasitic resistance. (C) 2016 Elsevier Ltd. All rights reserved.
引用
收藏
页码:325 / 335
页数:11
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