Modular Design for Symmetric Functions using Quantum Quaternary Logic

被引:1
作者
Deb, Arighna [1 ]
Das, Debesh K. [1 ]
Sur-Kolay, Susmita [2 ]
机构
[1] Jadavpur Univ, Comp Sci & Engg, Kolkata 700032, W Bengal, India
[2] Indian Stat Inst, ACM Unit, New Delhi, India
来源
2013 INTERNATIONAL SYMPOSIUM ON ELECTRONIC SYSTEM DESIGN (ISED) | 2013年
关键词
Reversible logic; Quaternary logic; Symmetric function;
D O I
10.1109/ISED.2013.35
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, we propose a method to realize symmetric binary functions as quaternary quantum/reversible circuits. In contrast to the existing binary synthesis methods, our design in quaternary domain offers a simple and regular cascade structure composed of quaternary quantum modules which enables significant reductions with respect to number of lines, levels and quantum costs. Further, a method to obtain an optimal realization is presented; this uses a few special quaternary quantum modules of low quantum cost. Experimental results confirm that our new method leads to realizations in quaternary domain with a significant reduction in number of lines, levels and quantum cost compared to the existing approaches in binary domain. Hence, our design in quaternary logic offers a useful alternative to existing designs in binary logic for realizing symmetric functions.
引用
收藏
页码:143 / 147
页数:5
相关论文
共 10 条
[1]  
[Anonymous], 1979, Computers and Intractablity: A Guide to the Theory of NP-Completeness
[2]  
[Anonymous], 1996, FINITE FIELDS
[3]   New upper bounds on the Boolean circuit complexity of symmetric functions [J].
Demenkov, E. ;
Kojevnikov, A. ;
Kulikov, A. ;
Yaroslavtsev, G. .
INFORMATION PROCESSING LETTERS, 2010, 110 (07) :264-267
[4]  
Khan M. H. A., 2007, J MULTIPLE VALUED LO, V13
[5]  
Khan MHA, 2006, ICECE 2006: PROCEEDINGS OF THE 4TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING, P157
[6]   Matriochka symmetric Boolean functions [J].
Lauradoux, Cedric ;
Videau, Marion .
2008 IEEE INTERNATIONAL SYMPOSIUM ON INFORMATION THEORY PROCEEDINGS, VOLS 1-6, 2008, :1631-+
[7]  
Mandal Sudhindu Bikash, 2012, Progress in VLSI Design and Test. Proceedings 16th International Symposium, VDAT 2012, P270, DOI 10.1007/978-3-642-31494-0_31
[8]   Efficient reversible and quantum implementations of symmetric Boolean functions [J].
Maslov, D. .
IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS, 2006, 153 (05) :467-472
[9]   Multivalued logic gates for quantum computation [J].
Muthukrishnan, A ;
Stroud, CR .
PHYSICAL REVIEW A, 2000, 62 (05) :052309-052301
[10]  
Wille R, 2009, DES AUT CON, P270