An implementation study of an analog CMOS detector for IR-UWB non-coherent receiver

This paper presents an implementation study of an analog pulse detector operating in the 3.1-10.6 GHz UWB band for a multi-band OOK receiver. The receiver's characteristics are in conformity with the specifications of UWB High Data Rates applications in terms of low cost and low power consumption. For that we especially focus on CMOS technology. This detector includes three stages: squarer, current amplification and integration. CADENCE's spectre simulation results in 0.35 mu m CMOS technology are presented to validate this very low complexity approach. This detector consumes only 0.6 mW per sub-band with a +/- 1.8 V supply for the amplifier core. Also, theoretical studies are given. In particular, transistors mismatches and imperfection of the squarer and amplification stages are identified in order to evaluate their effects on the global circuit performances. Monte-Carlo simulation results are given in order to enforce the analytical studies.