A 2.6 nW, 0.45 V Temperature-Compensated Subthreshold CMOS Voltage Reference

被引：232
作者：
Magnelli, Luca [1 ]
Crupi, Felice [1 ]
Corsonello, Pasquale [1 ]
Pace, Calogero [1 ]
Iannaccone, Giuseppe [2 ]
机构：
[1] Univ Calabria, Dipartimento Elettron Informat & Sistemist, I-87036 Arcavacata Di Rende, CS, Italy
[2] Univ Pisa, Dipartimento Ingn Informaz Elettron Infomat & Tel, I-56122 Pisa, PI, Italy
来源：
IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2011年 / 46卷 / 02期
关键词：
Voltage reference; subthreshold circuit; ultra-low power; temperature compensation; CMOS analog design; BANDGAP REFERENCE CIRCUIT; PPM/DEGREES-C; SUB-1-V;
D O I：
10.1109/JSSC.2010.2092997
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A voltage reference circuit operating with all transistors biased in weak inversion, providing a mean reference voltage of 257.5 mV, has been fabricated in 0.18 mu m CMOS technology. The reference voltage can be approximated by the difference of transistor threshold voltages at room temperature. Accurate subthreshold design allows the circuit to work at room temperature with supply voltages down to 0.45 V and an average current consumption of 5.8 nA. Measurements performed over a set of 40 samples showed an average temperature coefficient of 165 ppm/degrees C with a standard deviation of 100 ppm/degrees C, in a temperature range from 0 to 125 degrees C. The mean line sensitivity is approximate to 0.44%/V, for supply voltages ranging from 0.45 to 1.8 V. The power supply rejection ratio measured at 30 Hz and simulated at 10 MHz is lower than -40 dB and -12 dB, respectively. The active area of the circuit is approximate to 0.043 mm(2).
引用
收藏
页码：465 / 474
页数：10
相关论文
共 22 条
[1]   A very high precision 500-nA CMOS floating-gate analog voltage reference [J].
Ahuja, BK ;
Vu, H ;
Laber, CA ;
Owen, WH .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2005, 40 (12) :2364-2372
[2]   A 0.6-V Dynamic Biasing Filter With 89-dB Dynamic Range in 0.18-μm CMOS [J].
Akita, Ippei ;
Wada, Kazuyuki ;
Tadokoro, Yoshiaki .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2009, 44 (10) :2790-2799
[3]   A CMOS bandgap reference circuit with sub-1-V operation [J].
Banba, H ;
Shiga, H ;
Umezawa, A ;
Miyaba, T ;
Tanzawa, T ;
Atsumi, S ;
Sakui, K .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (05) :670-674
[4]   A sub-1-V, 10 ppm/°C, nanopower voltage reference generator [J].
De Vita, Giuseppe ;
Iannaccone, Giuseppe .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2007, 42 (07) :1536-1542
[5]   A CMOS subbandgap reference circuit with 1-V power supply voltage [J].
Doyle, J ;
Lee, YJ ;
Kim, YB ;
Wilsch, H ;
Lombardi, F .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (01) :252-255
[6]   Mutual compensation of mobility and threshold voltage temperature effects with applications in CMOS circuits [J].
Filanovsky, IM ;
Allam, A .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS, 2001, 48 (07) :876-884
[7]   A low-voltage low-power voltage reference based on subthreshold MOSFETs [J].
Giustolisi, G ;
Palumbo, G ;
Criscione, M ;
Cutrì, F .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (01) :151-154
[8]   A radiation hard bandgap reference circuit in a standard 0.13 μm CMOS technology [J].
Gromov, Vladimir ;
Annema, Anne Johan ;
Kluit, Ruud ;
Visschers, Jan Lammert ;
Timmer, P. .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2007, 54 (06) :2727-2733
[9]  
Hastings A., 2001, The Art of Analog Layout, Vfirst
[10]   A simple subthreshold CMOS voltage reference circuit with channel-length modulation compensation [J].
Huang, Po-Hsuan ;
Lin, Hongchin ;
Lin, Yen-Tai .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2006, 53 (09) :882-885
123