Fundamental limitations of continuous-time delta-sigma modulators due to clock jitter

被引：60

作者：

Reddy, Karthikeyan ^{[1
]}

Pavan, Shanthi ^{[1
]}

机构：

[1] Indian Inst Technol, Dept Elect Engn, Madras 600036, Tamil Nadu, India

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | 2007年 / 54卷 / 10期

关键词：

confinuous-time delta-sigma (Delta Sigma) modulators (CT-DSMs); noise transfer function (NTF); nonreturn to zero (NRZ);

D O I：

10.1109/TCSI.2007.905648

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We examine noise due to clock jitter in single-loop lowpass continuous-time delta-sigma (Delta Sigma) modulators (CT-DSMs) employing nonreturn to zero (NRZ) feedback digital-to-analog converters (DACs). Using the discrete-time version of the Bode sensitivity integral, we derive a lower bound on jitter noise and its relationship to the noise transfer function (NTF) of the modulator. We show that NTFs with optimized zeros result in lower jitter noise than those with all zeros at the origin. We give intuition to a recent observation (arrived through numerical optimization) that NTFs with peaking in their passbands have lower jitter noise than maximally flat NTFs. We propose a design procedure that minimizes the sum of the quantization and jitter noise. The arguments regarding Delta Sigma analog-to-digital converters are extended to Delta Sigma DACs and measurement results are presented.

引用

页码：2184 / 2194

页数：11

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