Chip package co-design of a heterogeneously integrated 2.45GHz CMOS VCO using embedded passives in a silicon package

被引:2
作者
Nayak, G [1 ]
Mukund, PR [1 ]
机构
[1] Rochester Inst Technol, Dept Elect Engn, Rochester, NY 14623 USA
来源
17TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: DESIGN METHODOLOGIES FOR THE GIGASCALE ERA | 2004年
关键词
D O I
10.1109/ICVD.2004.1260989
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Phase Noise Performance of a Voltage Controlled Oscillator that determines spectral purity is dependent on the Quality Factor (Q) of the tank in LC Oscillators. On-chip inductors that are used to realize the LC tank have comparatively low quality factors and consume considerable die area. Here a Chip-Package Co-Design for a 2.45GHz VCO is described using a high Q (similar to30) inductor embedded in a silicon substrate. The heterogeneously integrated circuit has a phase noise of 110dBc/Hz at a 100kHz offset with power dissipation of 28m W from a 2.5 V supply and has a tuning range of 6%. The resulting improvement in inductor coil quality factor, phase noise and area savings compared to a fully integrated VCO design is demonstrated.
引用
收藏
页码:627 / 630
页数:4
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