Fabrication of twin nano silicon wires based on arsenic dopant effect

被引:6
作者
Tang, XH [1 ]
Baie, X [1 ]
Colinge, JP [1 ]
机构
[1] Univ Catholique Louvain, DICE, B-1348 Louvain, Belgium
来源
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS | 1998年 / 37卷 / 3B期
关键词
nano wires; single-electron memory; dopant effect; oxidation rate; SOI wafer;
D O I
10.1143/JJAP.37.1591
中图分类号
O59 [应用物理学];
学科分类号
摘要
This paper reports a simple fabrication process of Si "twin nano wires" based on As dopant effect which gives rise to a significant increase of the oxidation rate at the peak concentration of As. The processing procedures consist of As doping, deposition of silicon nitride layer, electron beam lithography, reactive ion etching, wet oxide and deposition of polysilicon. The resulting Si "twin nano wires': have a small top wire with a dimension of 10 nm and a triangular channel wire with a height of 250 nm. A possible application of the "twin nano wires" to a future single-electron memory device on silicon on insulator (SOI) wafer is also discussed.
引用
收藏
页码:1591 / 1593
页数:3
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