Analysis and design of Mixed signal Oscilloscope for jitter reduction

被引:0
作者
Senthooradevi, K. [1 ]
机构
[1] Mohammad Sathak AJ Coll Engn, Madras, Tamil Nadu, India
来源
2014 IEEE NATIONAL CONFERENCE ON EMERGING TRENDS IN NEW & RENEWABLE ENERGY SOURCES AND ENERGY MANAGEMENT (NCET NRES EM) | 2014年
关键词
Asynchronous sampling; built-in self test (BIST); eye diagram; eye-opening monitor (EOM); jitter measurement; on-chip oscilloscope;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a 12.5-Gb/s on-chip oscilloscope (OCO) circuit to measure eye diagrams and jitter histograms of high-speed digital signals. The proposed circuit adopts a novel architecture to capture both single-ended and differential signals. In addition, it is capable of measuring the eye openings and jitter of the input signals without the need to construct the whole eye diagram which makes it a suitable candidate for eye opening monitor circuits. An asynchronous sampling technique and an efficient algorithm are employed in this research to decrease the area of the OCO as well as its processing time. The proposed circuit is fabricated in a 65-nm CMOS technology and the measurement results show sub -Pico second resolution when the input signals consist of a 10-GHz clock signal and a 12.5 GB/spseudorandom binary sequence. The OCO circuit has a power consumption of 1.9 m W, and its core area is 40 x 60 mu m.
引用
收藏
页码:105 / 108
页数:4
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