Information Hiding for AES Core Based on Randomness

被引：0

作者：

Liu, Hongying ^{[1
]}

Zhou, Ying ^{[2
]}

Fan, Yibo ^{[3
]}

Tsunoo, Yukiyasu ^{[4
]}

Goto, Satoshi ^{[1
]}

机构：

[1] Waseda Univ, Grad Sch Informat Prod & Syst, Kitakyushu, Fukuoka 8080135, Japan

[2] ROHM Co Ltd, Technol Ctr, Yokohama, Kanagawa 2228575, Japan

[3] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China

[4] NEC Corp Ltd, Informat & Media Proc Labs, Kawasaki, Kanagawa 2118666, Japan

来源：

CEIS 2011 | 2011年 / 15卷

关键词：

Information hiding; AES; DPA attack; countermeasure; implementation;

D O I：

10.1016/j.proeng.2011.08.395

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Advanced Encryption Standard (AES) is widely used symmetric cryptographic algorithm due to its ease in implementation on hardware and software. A number of works have been carried out on the reduction of power consumption of AES cores. Furthermore, the security of its implementation against side channel attacks also draws extensive attention. Various countermeasures that protect it from attack have been proposed. However not all of them is sufficient for high throughput applications. In this paper, we design and implement a differential power analysis (DPA) resistant AES core on Side-channel Attack Standard Evaluation Board. It is not only compact but also secure. The throughput is 2.56Gbps at 200MHz. By adding a set of registers and a random generator, the data-dependent encryption is hidden from observation. The experiments of DPA attack substantiate its effectiveness. (C) 2011 Published by Elsevier Ltd. Selection and/or peer-review under responsibility of [CEIS 2011]

引用

页数：5

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